Comparación de Modelos para Inductores Integrados en Tecnología CMOS

Eric Gutierrez-Frias, Edwin Becerra-Alvarez

Resumen


En este artículo se implementaron 15 inductores integrados en una tecnología CMOS 0.35 μm de TSMC, los cuales ocupan un área de 6.42 mm2. Por otro lado, se analizaron cuatro modelos para dichos inductores, donde estos se comparan con inductores de un kit de diseño en Cadence Virtuoso® para verificar su desempeño. Dando como resultado un error relativo menor al 14%en 10 inductores. Sin embargo, en los inductores restantes no hay similitud debido en parte a la falta de flexibilidad en el kit de diseño.

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Referencias


N. M. Nguyen, R. G. Meyer, “Si IC-compatible inductors and LC passive

filters”. IEEE Journal of Solid-State Circuits.Vol. 25.No 4. 1990.P. 1028-1031.

E. C. Becerra-Alvarez, F. Sandoval-Ibarra and J.M. de la Rosa, "Continuously-Tuned 1-V 90-nm CMOS LNAs for Multi-Standard Wireless Applications". Proc. of the 2011 Workshop on Analog and Digital Electronic Design (WADED).Oct. 5–7 2011.

Amor, M. B., Loulou, M., Quintanel, S., & Pasquet, D.,“An integrated 0.35 μm CMOS technology inductor for wideband LNA application”. Proc. of the 16th international conference on Telecommunications. May 2009, pp. 313-317.

K. B. Ashby, I. A. Koullias, W. C. Finley, J. J. Bastek, and S. Moinian,“High Q Inductors for wireless applications in a complementary silicon bipolar process”.IEEE JSSC.Vol. 31.No. 1. Jan. 1996.P. 4-9.

M. Niknejad, Robert G. Meyer. “Analysis, design, and optimization of spiral inductors and transformers for Si RF ICs”. IEEE Journal of Solid-State

Circuits.Vol. 33.No. 10. 1998.P. 1470-1481.

J. N.Burghartz, M. Soyuer, K. A. Jenkins, “Microwave inductorsand capacitors in standard multilevel interconnect silicon technology”.IEEE Trans. M n.Vol. 44.No. 1. P. 100-104.

Hizon, J. R. E., Rosales, M. D., Alarcon, L. P., & Sabido, D. J. “Integrating spiral inductors on 0.25 μm epitaxial CMOS process”. Proc. Of the Microwave Conference Asia-Pacific. Vol. 1, December 2005, pp. 4-pp.

Goni, A., Del Pino, J., Gonzalez, B., & Hernandez, A. “An analytical model of electric substrate losses for planar spiral inductors on silicon”. IEEE transactions on electron devices, 2007, 54(3), 546-553.

C. P. Yue, C. Ryu, J. Lau, T. H. Lee, S. S. Wong, “A physical model for planar spiral inductors on silicon".Proc. of the IEEE IEDM'96. 1996.

I. T. Ho. S. K. Mullick, “Analysis of transmission lines on integrated circuit chips”.IEEE Journal of Solid-State Circuits.Vol. 2.No. 4. Dec. 1967.P. 201-208.

H. Hasegawa, M. Furukawa, H. Yanai, “Properties of microstrip lineon Si-Si02system”. IEEE Trans. M U.Vol. 19.No. 11. Nov.1971.P. 869-881.

D. Lovelace, N. Camilleri, G. Kannell, “Silicon MMIC inductor modeling for high volume, low cost applications”.Microw. J. Aug. 1994.P. 60–71.

J. R. Long and M. A. Copeland, “The modeling, characterization, anddesign of monolithic inductors for silicon RFIC’s”.IEEE Journal of Solid-State Circuits.

J. Crols, P. Kinget, J. Craninckx, M. S. J. Steyaert, “An analytical model of planar inductors on lowly doped silicon substrates for high frequency analog design up to 3 GHz”.Symp. VLSI Circuits Dig. Tech. Papers. June 1996. P. 28–29.

H. M. Greenhouse, “Design of planar rectangular microelectronic inductors”.IEEE Transactions on parts, hybrids, and packaging.Vol.PHP-10.No. 2.1974, P. 101-109.

F. W. Grover, Inductance Calculations.1946. Ed. Dover. New York.

S. S. Mohan, M. M. Hershenson, S. P. Boyd, T. H. Lee, “Simple accurate

expressions for planar spiral inductances”.IEEE Journal of Solid State

Circuits.Vol. 34. Oct. 1999.P. 1419-24.

H. A. Wheeler, “Simple inductance formulas for radio coils”. Proc. of the Institute of Radio EngineersVol. 16.No. 10. Oct. 1928.P. 1398–1400.

S. S. Mohan, “The design, modeling and optimization of on-chip inductor and transformer circuits”.PhD Thesis. Stanford University. Dec. 1999.

Nolasco, O., Sandoval, F., Ortega, E., & Gurrola, J. (2013, November). “Passive inductors in silicon: A design proposal”. IEEE Power, Electronics and Computing (ROPEC), November 2013 IEEE International Autumn Meeting on (pp. 1-6). IEEE.

S. Jenei, B. Nauwelaers and S. Decoutere, “Physics based closed-form

inductance expression for compact modeling of integrated inductors”.IEEE

Journal of Solid State Circuits.Vol. 37. Jan. 2002.P. 77-80.

S. Asgaran. “New accurate physics-based closed-form expressions for compact modeling and design of on-chip spiral inductors”. Microelectronics, Proc. of the 14th International Conference on 2002-ICM. IEEE. 2002. P. 247-250.

http://www.mosis.com. Abril. 2014.

G. L. Pollack, D. R. Stump, “Electromagnetism”, San Francisco, CA.Addison Wesley. 2002. Vol. 537.

http://teleformacion.edu.aytolacoruna.es/FISICA/document/fisicaInteractiva/medidas/glosario2.htm. Abril. 2014.


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